fgarcia@laptop: ~/research_activity_and_resources

Research Activity and Resources

Overview

Current
PhD. in Electronic Systems Engineer working at the Integrated Systems Laboratory, UPM.
Background
5-year Engineering degree (B.S. + MSc) in Telecommunications, with a major in Electronics from the Universidad Politécnica de Madrid MSc in Electronic Systems Engineering, from the Universidad Politécnica de Madrid.
Main Research Lines
Memristor/RRAM modeling and simulation, novel circuits design and simulation approaches for neuromorphic applications and reliable circuit design including PVT and radiation.

Open-Sourced Resources

Main repositories page at GitHub.
The following resources are directly related to the PhD. research work:
  1. VLSI Memristor/RRAM SPICE Compact Model SPICE and Spectre model of unipolar and bipolar memristors, considering endurance and variability.
  2. Circuit Reliability Framework Reliability oriented framework for the characterization of CMOS/RRAM hybrid circuits.
  3. Memristor Application Framework Framework for the characterization and use of memristor compact models.
  4. Memristor Application Framework (Legacy) Framework for the characterization and use of memristor compact models. SMACD_2012 version.
  5. Also, in the case that you work with VLSI CAD software, it is possible that the Installing Cadence VLSI software under Ubuntu 64 bits guide is useful for you.

Research Profiles

Research Projects

Participation in research projects.

Publications

Journals
Auto-Erasable RRAM Architecture Secured Against Physical and Firmware Attacks
Fernando García-Redondo, Marisa López-Vallejo
IEEE Transactions on Circuits and Systems I: Regular Papers. Accepted for publication. DOI: 10.1109/TCSI.2017.2755123
2017
On the Design and Analysis of Reliable RRAM-CMOS Hybrid Circuits
Fernando García-Redondo, Marisa López-Vallejo
IEEE Transactions on Nanotechnology . Volume: 16, Issue:3, Pages 514-522. July 2017. DOI: 10.1109/TNANO.2017.2697311
2017
Reconfigurable Writing Architecture for Reliable RRAM Operation in Wide Temperature Ranges
Fernando García-Redondo, Pablo Royer, Marisa López-Vallejo, Hernán Aparicio, Pablo Ituero, Carlos A. López-Barrio
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. Volume: 25, Issue: 4, Pages 1224 - 1235. April 2017. DOI: 10.1109/TVLSI.2016.2634083
2017
SPICE Compact Modeling of Bipolar/Unipolar Memristor Switching Governed by Electrical Thresholds
Fernando García-Redondo, Robert P. Gowers, A. Crespo-Yepes, Marisa López-Vallejo, Liudi Jiang
IEEE Transactions on Circuits and Systems I: Regular Papers, Volume: 63, Issue: 8, Pages: 1255 - 1264. Aug. 2016. DOI: 10.1109/TCSI.2016.2564703
2016
Building Memristor Applications: From Device Model to Circuit Design
Fernando García-Redondo, Marisa López-Vallejo, Pablo Ituero
IEEE Transactions on Nanotechnology. November 2014. Volume 13, Issue 6, pp 1154-1162. DOI: 10.1109/TNANO.2014.2345093
2014
The tractability index of memristive circuits: branch-oriented and tree-based models
Fernando García-Redondo, Ricardo Riaza
Mathematical Methods in the Applied Sciences. 2012. Volume 35, Issue 14, pp 1659-1669. DOI: 10.1002/mma.2544
2012
International Conferences
Advanced Integration of Variability and Degradation in RRAM SPICE Compact Models
Fernando García-Redondo, Marisa López-Vallejo
14th IEEE International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD 2017). 12 -15 June 2017. Taormina (Italy)
2017
CAS-T Lecture: Reconfigurable Writing Architecture for Reliable RRAM Operation in Wide Temperature Ranges
Fernando García-Redondo, Pablo Royer, Marisa López-Vallejo, Hernán Aparicio, Pablo Ituero, Carlos A. López-Barrio
IEEE international Symposium on Circuits and Systems, (ISCAS 2017). May 28-31 2017. Baltimore, MD, USA
2017
CAS-T Lecture: SPICE Compact Modeling of Bipolar/Unipolar Memristor Switching Governed by Electrical Thresholds
Fernando García-Redondo, Robert P. Gowers, A. Crespo-Yepes, Marisa López-Vallejo, Liudi Jiang
IEEE international Symposium on Circuits and Systems, (ISCAS 2017). May 28-31 2017. Baltimore, MD, USA
2017
Characterization of Analog Modules: Reliability Analyses of Radiation, Temperature and Variations Effects
Fernando García-Redondo, Hernán Aparicio, Marisa López-Vallejo, Pablo Ituero, Carlos López-Barrio
Conference on Design of Circuits and Integrated Systems 2016 (DCIS 2016) Granada (Spain)
2016
Reliable Design Methodology: The Combined Effect of Radiation, Variability and Temperature
Fernando García-Redondo, Marisa Lopez-Vallejo, Hernán Hernán Aparicio Cerqueira, Pablo Ituero
13 th IEEE International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD 2016). 27 - 30 June 2016. Lisbon (Portugal)
2016
Taxonomy of Power Supply Monitors and Integration Challenges
Pablo Ituero, Marisa López-Vallejo, Hernán Aparicio, Fernando Garcia-Redondo
Mixed-Signal Testing Workshop (IMSTW), 2016 IEEE 21st International. 4 - 6 July 2016. Catalonia (Spain)
2016
A Thermal Adaptive Scheme for Reliable Write Operation on RRAM Based Architectures
Fernando García-Redondo, Marisa López-Vallejo, Pablo Ituero
33rd IEEE International Conference on Computer Design, ICCD 2015, (New York)
2015
Evolution of radiation-induced soft errors in FinFET SRAMs under process variations beyond 22nm
Pablo Royer, Fernando García-Redondo, Marisa López-Vallejo
Nanoscale Architectures (NANOARCH), 2015 IEEE/ACM International Symposium on. 8-10 July 2015. Boston, MA, USA
2015
A Tool for the Automatic Analysis of Single Events Effects on Electronic Circuits
Fernando García-Redondo, Marisa López-Vallejo, Pablo Royer, Javier Agustín
5th European Workshop on CMOS Variability, PATMOS VARI 2014. 29 September - 1 October 2014. Mallorca (Spain)
2014
Four-Injector Variability Modeling of FinFET Predictive Technology Models
Pablo Royer, Marisa López-Vallejo, Fernando García-Redondo, Carlos A. López Barrio
5th European Workshop on CMOS Variability, PATMOS VARI 2014. 29 September - 1 October 2014. Mallorca (Spain)
2014
Improvement of Radar Capabilities by Reconfigurable Digital Signal Processing
Fernando García-Redondo, Víctor Iglesias, Miguel A. Sánchez, Jesús Grajal, Marisa López-Vallejo, Carlos López-Barrio
Conference on Design of Circuits and Integrated Systems 2013 (DCIS 2013) San Sebastián (Spain)
2013
Model Validation and Simulation Framework for Novel Nanometer Devices
Fernando García-Redondo, Marisa López-Vallejo, Pablo Ituero, Carlos López Barrio
Conference on Design of Circuits and Integrated Systems 2012 (DCIS 2012). 28-30 November 2012. Avignon (France)
2012
A CAD Framework for the Characterization and Use of Memristor Models
Fernando García, Marisa López-Vallejo, and Pablo Ituero
International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design 2012 (SMACD2012). 19 - 21 September 2012. Seville (Spain)
2012
Temperature Sensor Placement Including Routing Overhead and Sampling Inaccuracies
Pablo Ituero, Fernando García, and Marisa López-Vallejo
International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design 2012 (SMACD2012). 19 - 21 September 2012. Seville (Spain)
2012
Assessing Self-Learning Electronics Through the Support of Remote Labs
Marisa López-Vallejo, Pablo Ituero, Ángel Férnandez-Herrero, and Fernando García
IADIS International Conference on e-Learning 2011 (EL 2011). 20 - 23 July 2011. Rome, Italy
2011
Web-based Integrated Environment for Self-learning Electronics: the Analog and Digital Laboratory at Home
Ángel Fernández-Herrero, Pablo Ituero, Marisa López-Vallejo, Fernando García Redondo
Interactive Computer Aided Learning (ICL 2010), 15-17 September 2010. Hasselt (Belgium)
2010
PhD. Thesis
Resistive RAM: Simulation and Modeling for Reliable Design
Fernando García Redondo
Advised by Marisa López-Vallejo. DOI: 10.20868/UPM.thesis.46845. Department of Electronic Engineering. Universidad Politécnica of Madrid
June. 2017
Master Thesis
Design and Implementation of a Simulation Framework for Circuits Using Memristors
Fernando García Redondo
Dept. Electronic Engineering and Department Applied Mathematics for Information Technology. Universidad Politécnica de Madrid.
Feb. 2012

Contact

University web-page: LSI profile.
Research Group web-page: VLSI profile.
Departamento de Ingeniería Electrónica
E.T.S.I. Telecomunicación
Universidad Politécnica de Madrid
Room C.206
fgarcia@die.upm.es
fernando.garca@gmail.com
Phone: +34915495700 ext. 4226
Fax: +34913367323

CC Attribution-NonCommercial License Fernando García